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US Patent 11881867 Calibration scheme for filling lookup table in an ADC

Patent 11881867 was granted and assigned to Texas Instruments on January, 2024 by the United States Patent and Trademark Office.

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Patent abstractTimelineTable: Further ResourcesReferences
Is a
Patent
Patent
1

Patent attributes

Patent Applicant
Texas Instruments
Texas Instruments
1
Current Assignee
Texas Instruments
Texas Instruments
1
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
1
Patent Number
118818671
Patent Inventor Names
Chirag Chandrahas Shetty1
Visvesvaraya Appala Pentakota1
Harshit Moondra1
Shagun Dusad1
Neeraj Shrivastava1
Narasimhan Rajagopal1
Shivam Srivastava1
Eeshan Miglani1
...
Date of Patent
January 23, 2024
1
Patent Application Number
174675611
Date Filed
September 7, 2021
1
Patent Citations
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US Patent 7379007 A/D converter, A/D converter apparatus, and sampling clock skew control method
1
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US Patent 7379010 Extension of accuracy of a flash ADC by 1-bit through interpolation of comparator outputs
1
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US Patent 7405689 Predictive analog to digital converters and methods of using
1
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US Patent 7501862 Comparator with low offset voltage
1
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US Patent 7525471 Wide-input windowed nonlinear analog-to-digital converter for high-frequency digitally controlled SMPS
1
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US Patent 7557746 Time domain interpolation scheme for flash A/D converters
1
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US Patent 7737875 Time interpolation flash ADC having automatic feedback calibration
1
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US Patent 6857002 Integrated circuit with a mode control selecting settled and unsettled output from a filter
1
...
Patent Primary Examiner
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Lam T. Mai
1
CPC Code
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H03M 1/0836
1
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H03M 1/0624
1
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H03M 1/1019
1
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H03M 1/365
1
Patent abstract

In described examples, a circuit includes a calibration engine. The calibration engine generates multiple input codes. A digital to analog converter (DAC) is coupled to the calibration engine, and generates a first calibration signal in response to a first input code of the multiple input codes. An analog to digital converter (ADC) is coupled to the DAC, and generates multiple raw codes responsive to the first calibration signal. A storage circuit is coupled to the ADC and stores a first output code corresponding to the first input code. The first output code is obtained using the multiple raw codes generated by the ADC.

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