US Patent 7426604 Virtual output buffer architecture
Patent 7426604 was granted and assigned to Sun Microsystems on September, 2008 by the United States Patent and Trademark Office.
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Patent abstract
A buffer architecture enables linked lists to be used to administer virtual output queue buffering. The buffer has three random access memories (RAMs). A data RAM holds data. A free RAM holds a linked list of entries defining free space in the data RAM. Destination RAM holds a linked list of entries defining data in the data RAM to be forwarded to a destination.
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US Patent 07426604 Virtual output buffer architecture US Patent 7426604 Virtual output buffer architecture
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Patent Number
0742660400
Patent Number
742660400
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Current Assignee
Patent Jurisdiction
Patent Number
074266040
Date of Patent
September 16, 2008
0Patent Application Number
114537590
Date Filed
June 14, 2006
0Official Website
Patent Primary Examiner
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Is a
Current Assignee
Patent Jurisdiction
Patent Number
074266040
Date of Patent
September 16, 2008
0Patent Application Number
114537590
Date Filed
June 14, 2006
0Official Website
Patent Primary Examiner
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US Patent 07426604 Virtual output buffer architecture
Infobox
Is a
Current assignee
Patent jurisdiction
Patent number
07426604
Date of patent
September 16, 2008
Patent application number
11453759
Date Filed
June 14, 2006
Patent primary examiner
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