Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Date of Patent
September 16, 2008
Patent Application Number
11453759
Date Filed
June 14, 2006
Patent Citations Received
Patent Primary Examiner
Patent abstract
A buffer architecture enables linked lists to be used to administer virtual output queue buffering. The buffer has three random access memories (RAMs). A data RAM holds data. A free RAM holds a linked list of entries defining free space in the data RAM. Destination RAM holds a linked list of entries defining data in the data RAM to be forwarded to a destination.
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