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US Patent 12131955 Gate structures for semiconductor devices

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
April 4, 2022
0
Date of Patent
October 29, 2024
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Patent Application Number
17712486
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Patent Citations
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US Patent 9443771 Methods to thin down RMG sidewall layers for scalability of gate-last planar CMOS and FinFET technology
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US Patent 9520482 Method of cutting metal gate
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US Patent 9548303 FinFET devices with unique fin shape and the fabrication thereof
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US Patent 9564489 Multiple gate field-effect transistors having oxygen-scavenged gate stack
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US Patent 9576814 Method of spacer patterning to form a target integrated circuit pattern
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US Patent 9601342 FinFETs with strained well regions
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US Patent 9608116 FINFETs with wrap-around silicide and method forming the same
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US Patent 9698241 Integrated circuits with replacement metal gates and methods for fabricating the same
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US Patent 9997519 Dual channel structures with multiple threshold voltages
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US Patent 10229986 Vertical transport field-effect transistor including dual layer top spacer
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•••
Patent Inventor Names
Chung-Liang Cheng
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
12131955
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Patent Primary Examiner
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Tong-Ho Kim
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CPC Code
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H01L 21/823828
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H01L 21/823857
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B82Y 10/00
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H01L 29/66795
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H01L 21/823842
0
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H01L 21/02244
0
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H01L 21/02252
0
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H01L 21/02603
0
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H01L 21/28088
0
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H01L 21/823807
0
•••

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