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US Patent 12093748 Disaggregated computing for distributed confidential computing environment

Patent 12093748 was granted and assigned to Intel on September, 2024 by the United States Patent and Trademark Office.

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Contents

Is a
Patent
Patent
0

Patent attributes

Patent Applicant
Intel
Intel
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Current Assignee
Intel
Intel
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
120937480
Patent Inventor Names
Soham Jayesh Desai0
Reshma Lal0
Selvakumar Panneer0
Luis Kida0
Sujoy Sen0
Robert Sharp0
Pradeep Pappachan0
Date of Patent
September 17, 2024
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Patent Application Number
171330660
Date Filed
December 23, 2020
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Patent Citations
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US Patent 10652108 Techniques to establish service level agreements or quality of service for remotely accessible storage devices
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US Patent 10528765 Technologies for secure boot provisioning and management of field-programmable gate array images
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US Patent 10776145 Systems and methods for traffic monitoring in a virtualized software defined storage architecture
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US Patent 11449963 Virtual graphics processing with remote execution
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US Patent 11893425 Disaggregated computing for distributed confidential computing environment
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US Patent 11989595 Disaggregated computing for distributed confidential computing environment
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US Patent 11941457 Disaggregated computing for distributed confidential computing environment
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US Patent 7971236 Method and system for secure remote direct memory access
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...
Patent Primary Examiner
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Sisley N Kim
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CPC Code
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H04L 9/3242
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H04L 9/3234
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G06T 1/60
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G06T 1/20
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G06F 21/53
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G06F 9/5077
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G06F 9/5066
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G06F 9/5027
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Patent abstract

An apparatus to facilitate disaggregated computing for a distributed confidential computing environment is disclosed. The apparatus includes one or more processors to facilitate receiving a manifest corresponding to graph nodes representing regions of memory of a remote client machine, the graph nodes corresponding to a command buffer and to associated data structures and kernels of the command buffer used to initialize a hardware accelerator and execute the kernels, and the manifest indicating a destination memory location of each of the graph nodes and dependencies of each of the graph nodes; identifying, based on the manifest, the command buffer and the associated data structures to copy to the host memory; identifying, based on the manifest, the kernels to copy to local memory of the hardware accelerator; and patching addresses in the command buffer copied to the host memory with updated addresses of corresponding locations in the host memory.

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