US Patent 12068298 High power density 3D semiconductor module packaging
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US Patent 12068298 High power density 3D semiconductor module packaging
Article
Patent abstract
We herein describe a semiconductor device sub-assembly comprising at least two power semiconductor devices and a contact of a first type. A first power semiconductor device is located on a first side of the contact of a first type, and a second power semiconductor device is located on a second side of the contact of a first type, where the second side is opposite to the first side.
Infobox
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Patent Jurisdiction
Patent Number
Patent Inventor Names
Guoyou Liu0
Haihui Luo0
Yangang Wang0
Date of Patent
August 20, 2024
0Patent Application Number
174307540
Date Filed
November 2, 2020
0Patent Citations
Patent Primary Examiner
CPC Code
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