US Patent 11994982 Memory module with distributed data buffers

Patent

Netlist Inc.

Netlist Inc.

US Patent 6914324 Memory expansion and chip scale stacking system and method

US Patent 6944694 Routability for memory devices

US Patent 6947304 DDR memory modules with input buffers driving split traces with trace-impedance matching at trace junctions

US Patent 6948084 Method for interfacing a synchronous memory to an asynchronous memory interface and logic of same

US Patent 6950366 Method and system for providing a low power memory array

US Patent 6972981 Semiconductor memory module

US Patent 6981089 Memory bus termination with memory unit having termination control

US Patent 6982892 Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules

US Patent 6996686 Memory subsystem including memory modules having multiple banks

US Patent 7007130 Memory system including a memory module having a memory module controller interfacing between a system memory controller and memory devices of the memory module

United States Patent and Trademark Office

Michael T. Tran

G11C 5/066

G11C 8/12

G11C 5/02

G11C 5/06

G11C 7/10

G11C 5/04

G11C 5/025

G06F 12/00