Patent 11989084 was granted and assigned to HONEYWELL INTERNATIONAL INC on May, 2024 by the United States Patent and Trademark Office.
An implementation is for one or more hardware-based non-transitory memory devices storing computer-readable instructions which, when executed by the one or more processors disposed in a computing device, cause the computing device to monitor a logic block and a memory block to detect a fault condition, determine a subset of the logic block or the memory block that is impacted by the fault condition, and perform at least one action on the logic block and the memory block.