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US Patent 11942144 In-memory computation system with drift compensation circuit
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Patent
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Date Filed
January 24, 2022
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Date of Patent
March 26, 2024
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Patent Application Number
17582675
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Patent Citations
US Patent 9887011 Memory with controlled bit line charging
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US Patent 10056145 Resistive memory transition monitoring
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US Patent 10073733 System and method for in-memory computing
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US Patent 10319449 Memory device and operation method thereof
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US Patent 10373682 Write set operation for memory device with bit line capacitor drive
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US Patent 10607710 Method and apparatus for data refresh for analog non-volatile memory in deep learning neural network
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US Patent 10636481 Memory cell for computing-in-memory applications, memory unit for computing-in-memory applications and computing method thereof
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US Patent 10643677 Negative kick on bit line control transistors for faster bit line settling during sensing
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US Patent 10692570 Neural network matrix multiplication in memory cells
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US Patent 10762958 Resistive memory device including a reference cell and method of controlling a reference cell to identify values stored in memory cells
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Patent Inventor Names
Andrea Lico
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Marcella Carissimi
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Marco Pasotti
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Eleonora Franchi Scarselli
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Alessio Antolini
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Antonio Gnudi
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11942144
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Patent Primary Examiner
Fernando Hidalgo
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CPC Code
G06N 3/063
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G11C 11/4096
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G11C 11/4074
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G11C 11/4076
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G11C 11/4085
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G11C 11/4094
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G11C 11/5678
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G11C 13/0023
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G11C 13/0026
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G11C 2213/72
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