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US Patent 11886715 Memory array accessibility

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
November 19, 2021
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Date of Patent
January 30, 2024
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Patent Application Number
17531573
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Patent Citations
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US Patent 8503250 High speed DRAM architecture with uniform access latency
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US Patent 8644101 Local sense amplifier circuit and semiconductor memory device including the same
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US Patent 8650232 System and method for determination of a horizontal minimum of digital values
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US Patent 8873272 Semiconductor memory apparatus and test circuit therefor
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US Patent 8964496 Apparatuses and methods for performing compare operations using sensing circuitry
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US Patent 8971124 Apparatuses and methods for performing logical operations using sensing circuitry
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US Patent 9015390 Active memory data compression system and method
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US Patent 9047193 Processor-cache system and method
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US Patent 9165023 Integrated circuit device and method for determining an index of an extreme value within an array of values
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US Patent 10496311 Run-time instrumentation of guarded storage event processing
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•••
Patent Inventor Names
GAry L. Howe
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Daniel B. Penney
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11886715
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Patent Primary Examiner
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Zhuo H Li
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CPC Code
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G06F 3/0683
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G11C 7/065
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G11C 7/1006
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G06F 3/0659
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G06F 3/0644
0
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G06F 3/0622
0

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