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US Patent 11868250 Memory design for a processor

Patent 11868250 was granted and assigned to Groq on January, 2024 by the United States Patent and Trademark Office.

OverviewStructured DataIssuesContributors
Is a
Patent
Patent
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Current Assignee
Groq
Groq
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Date Filed
January 24, 2022
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Date of Patent
January 9, 2024
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Patent Applicant
Groq
Groq
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Patent Application Number
17582895
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Patent Citations
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US Patent 7339941 Connecting ethernet based system on a chip integrated circuits in a ring topology
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US Patent 7421559 Apparatus and method for a synchronous multi-port memory
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US Patent 7640528 Hardware acceleration of functional factoring
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US Patent 7805392 Pattern matching in a multiprocessor environment with finite state automaton transitions based on an order of vectors in a state transition table
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US Patent 7861060 Parallel data processing systems and methods using cooperative thread arrays and thread identifier values to determine processing behavior
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US Patent 7912889 Mapping the threads of a CTA to the elements of a tile for efficient matrix multiplication
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US Patent 7965725 Hyper-ring-on-chip (HyRoC) architecture
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US Patent 6988181 VLIW computer processing architecture having a scalable number of register files
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US Patent 7015913 Method and apparatus for multithreaded processing of data in a programmable graphics processor
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US Patent 7181484 Extended-precision accumulation of multiplier output
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•••
Patent Inventor Names
Gregory M. Thorson
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Jonathan Alexander Ross
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Dennis Charles Abts
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John Thompson
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11868250
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Patent Primary Examiner
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Edward J Dudek, Jr.
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CPC Code
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G06F 13/1689
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G06F 9/3814
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G06F 12/0292
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G06F 3/061
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G06F 3/064
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G06F 3/0673
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G06F 9/3004
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G06F 9/3009
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G06F 9/30145
0

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