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US Patent 11769830 Semiconductor devices
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Patent
Date Filed
September 30, 2020
Date of Patent
September 26, 2023
Patent Application Number
17038020
Patent Citations
US Patent 10685887 Method for incorporating multiple channel materials in a complimentary field effective transistor (CFET) device
US Patent 10297513 Stacked vertical NFET and PFET
US Patent 10381438 Vertically stacked NFETS and PFETS with gate-all-around structure
US Patent 8039893 CMOS inverter coupling circuit comprising vertical transistors
US Patent 9905477 Inverters and manufacturing methods thereof
US Patent 9941411 Vertical transistor fabrication and devices
US Patent 10230005 Four terminal stacked complementary junction field effect transistors
US Patent 10236292 Complementary FETs with wrap around contacts and methods of forming same
US Patent 10256158 Insulated epitaxial structures in nanosheet complementary field effect transistors
US Patent 10269914 Semiconductor device and manufacturing method thereof
Patent Inventor Names
Donghwan Han
Seungchan Yun
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11769830
Patent Primary Examiner
Michael M Trinh
CPC Code
H01L 27/0688
H01L 27/088
H01L 27/124
H01L 29/7827
H01L 29/78642
H01L 21/823412
H01L 29/78696
H01L 29/42392
H01L 29/66545
H01L 21/8221
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