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US Patent 11677026 Transistor having wrap-around source/drain contacts

OverviewStructured DataIssuesContributors
Is a
Patent
Patent
0
Date Filed
March 4, 2019
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Date of Patent
June 13, 2023
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Patent Application Number
16291336
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Patent Citations
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US Patent 9159794 Method to form wrap-around contact for finFET
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US Patent 9318581 Forming wrap-around silicide contact on finFET
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US Patent 9397197 Forming wrap-around silicide contact on finFET
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US Patent 9406804 FinFETs with contact-all-around
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US Patent 9805989 Sacrificial cap for forming semiconductor contact
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US Patent 9704744 Method of forming a wrap-around contact on a semiconductor device
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US Patent 10388569 Formation of stacked nanosheet semiconductor devices
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US Patent 7241655 Method of fabricating a vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array
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US Patent 7374990 Vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11677026
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Patent Primary Examiner
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Tony Tran
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CPC Code
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H01L 2924/00
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H01L 29/0673
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H01L 29/785
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H01L 27/088
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H01L 2924/0002
0

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