US Patent 9318581 Forming wrap-around silicide contact on finFET

A technique relates to a transistor. Dummy gates are formed on top of an isolation layer and over fins. Pillars are along sides of fins such that trenches separate the pillars from the sides of the fins. The pillars include a first intermediate layer formed on an isolation layer and a second intermediate layer formed on the first intermediate layer. An epitaxial layer is deposited in the trenches such that the epitaxial layer is laterally confined by the pillars. The top of the epitaxial layer forms a triangular shape that extends higher than the pillars. The pillars are removed such that straight sidewalls of the epitaxial layer are exposed. Dummy gates are replaced with replacement gates. A metal silicide contact that wraps around a source part and a drain part of the epitaxial layer is formed, by forming a conductive layer on top of the structure.