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US Patent 11507301 Memory module implementing memory centric architecture

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Date Filed
February 16, 2021
Date of Patent
November 22, 2022
Patent Application Number
17176860
Patent Citations
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US Patent 10121553 Capacitive-coupled non-volatile thin-film transistor NOR strings in three-dimensional arrays
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US Patent 10249370 Three-dimensional vertical NOR flash thing-film transistor strings
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US Patent 10254968 Hybrid memory device for lookup operations
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US Patent 10283493 Three-dimensional memory device containing bonded memory die and peripheral logic die and method of making thereof
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US Patent 10373956 Gated bipolar junction transistors, memory arrays, and methods of forming gated bipolar junction transistors
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US Patent 10381370 Semiconductor device
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US Patent 10381378 Three-dimensional vertical NOR flash thin-film transistor strings
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US Patent 10395737 Three-dimensional vertical NOR flash thin-film transistor strings
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US Patent 10431596 Staggered word line architecture for reduced disturb in 3-dimensional NOR memory arrays
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US Patent 10622377 3-dimensional NOR memory array with very fine pitch: device and method
•••
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
11507301
Patent Primary Examiner
‌
Christopher B. Shin
CPC Code
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G06F 3/0655
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G06F 3/061
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G06F 3/0673

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