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US Patent 11507301 Memory module implementing memory centric architecture

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Is a
Patent
Patent

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
11507301
Date of Patent
November 22, 2022
Patent Application Number
17176860
Date Filed
February 16, 2021
Patent Citations
‌
US Patent 10121553 Capacitive-coupled non-volatile thin-film transistor NOR strings in three-dimensional arrays
‌
US Patent 10249370 Three-dimensional vertical NOR flash thing-film transistor strings
‌
US Patent 10254968 Hybrid memory device for lookup operations
‌
US Patent 10283493 Three-dimensional memory device containing bonded memory die and peripheral logic die and method of making thereof
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US Patent 10373956 Gated bipolar junction transistors, memory arrays, and methods of forming gated bipolar junction transistors
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US Patent 10381370 Semiconductor device
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US Patent 10381378 Three-dimensional vertical NOR flash thin-film transistor strings
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US Patent 10395737 Three-dimensional vertical NOR flash thin-film transistor strings
...
Patent Primary Examiner
‌
Christopher B. Shin
CPC Code
‌
G06F 3/0655
‌
G06F 3/061
‌
G06F 3/0673

A semiconductor memory module for shared memory access implements memory-centric structures using a quasi-volatile memory. In one embodiment, the memory module for shared memory access includes a memory cube providing high capacity memory coupled to multiple multi-port memories to support simultaneous memory access at multiple memory interfaces. In other embodiments, a memory module incorporates a processor to implement computational memory architecture. In some embodiments, a mini core memory system implements a memory architecture for providing direct and parallel memory access to a mini processor core array.

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