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US Patent 11402413 Droop detection and mitigation

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Date Filed
December 5, 2019
Date of Patent
August 2, 2022
Patent Application Number
16704483
Patent Citations
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US Patent 10530370 Glitch-free PLL Multiplexer
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US Patent 10784874 All-digital voltage monitor (ADVM) with single-cycle latency
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US Patent 10162373 Variation immune on-die voltage droop detector
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US Patent 10784871 Clocking architecture for DVFS with low-frequency DLL locking
Patent Citations Received
‌
US Patent 11545987 Traversing a variable delay line in a deterministic number of clock cycles
‌
US Patent 11545981 DLL-based clocking architecture with programmable delay at phase detector inputs
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
11402413
Patent Primary Examiner
‌
Farhana A Hoque
CPC Code
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G01R 19/16504
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H03K 19/00346
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G01R 31/3004
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G06F 1/26

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