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US Patent 11402413 Droop detection and mitigation

Overview Structured Data Issues Contributors Activity

Is a

Patent attributes

Patent Jurisdiction

United States Patent and Trademark Office

Patent Number

Date of Patent

August 2, 2022

Patent Application Number

16704483

Date Filed

December 5, 2019

Patent Citations

US Patent 10530370 Glitch-free PLL Multiplexer

US Patent 10784874 All-digital voltage monitor (ADVM) with single-cycle latency

US Patent 10162373 Variation immune on-die voltage droop detector

US Patent 10784871 Clocking architecture for DVFS with low-frequency DLL locking

Patent Citations Received

US Patent 11545987 Traversing a variable delay line in a deterministic number of clock cycles

US Patent 11545981 DLL-based clocking architecture with programmable delay at phase detector inputs

Patent Primary Examiner

Farhana A Hoque

CPC Code

In an embodiment, a method includes filtering, with a low-pass filter, a voltage signal (V

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