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US Patent 11362235 Substrate structuring methods
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Is a
Patent
Current Assignee
Applied Materials
Date Filed
April 12, 2021
Date of Patent
June 14, 2022
Patent Applicant
Applied Materials
Patent Application Number
17227763
Patent Citations
US Patent 10090284 Semiconductor device and method of manufacture
US Patent 10014292 3D semiconductor device and structure
US Patent 10037975 Semiconductor device package and a method of manufacturing the same
US Patent 10053359 Microelectronic packages having axially-partitioned hermetic cavities and methods for the fabrication thereof
US Patent 10211072 Method of reconstituted substrate formation for advanced packaging applications
US Patent 10229827 Method of redistribution layer formation for advanced packaging applications
US Patent 10256180 Package structure and manufacturing method of package structure
US Patent 10269773 Semiconductor packages and methods of forming the same
US Patent 10297518 Semiconductor device and method of forming supporting layer over semiconductor die in thin fan-out wafer level chip scale package
US Patent 10297586 Methods for processing a 3D semiconductor device
•••
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11362235
Patent Primary Examiner
Earl N Taylor
CPC Code
H01L 23/49827
H01L 21/486
Y02E 10/547
H01L 21/6835
H01L 2221/68345
H01L 31/1804
H01L 21/0275
H01L 21/3046
H01L 21/30621
H01L 21/3086
•••
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