US Patent 11335677 Combined MCD and MOS transistor semiconductor device

This disclosure relates to a combined MOS controlled diode (MCD) and MOS transistor semiconductor device and associated method of manufacture. The semiconductor device includes an epitaxial semiconductor layer arranged on a semiconductor substrate and a matrix of trenches formed in the epitaxial layer, with the matrix of trenches including a first plurality of spaced apart parallel trenches and a second plurality of spaced apart parallel trenches. Each of the first plurality of parallel trenches is orthogonal to each of the second plurality of parallel trenches and gate electrodes are arranged in each of the first plurality of spaced apart parallel trenches. Source electrodes are arranged in each of the second plurality of spaced apart parallel trenches.