US Patent 11233085 Multi-photo pixel cell having vertical gate structure

An apparatus is provided. The apparatus includes a semiconductor substrate including a first photodiode to generate a first charge, a second photodiode to generate a second charge, a barrier layer between the first photodiode and the second photodiode, wherein the first photodiode, the barrier layer, and the second photodiode form a stack. The apparatus further includes a floating drain and one or more gates including: a first gate portion on the semiconductor substrate and a second gate portion extending from the front side surface through the first photodiode and reaching the barrier layer. The first gate portion is configured to conduct a first signal to control flow of charge from the first photodiode to the floating drain, and the second gate portion is configured to conduct a second signal to control the barrier layer to control the flow of the second charge.