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US Patent 11038602 On-chip jitter evaluation for SerDes
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Is a
Patent
Date Filed
February 5, 2020
Date of Patent
June 15, 2021
Patent Application Number
16782926
Patent Citations
US Patent 10305495 Phase control of clock signal based on feedback
US Patent 10313105 Fractional-N PLL based clock recovery for SerDes
US Patent 10313165 Finite impulse response analog receive filter with amplifier-based delay chain
US Patent 10389515 Integrated circuit, multi-channel transmission apparatus and signal transmission method thereof
US Patent 10447461 Accessing data via different clocks
US Patent 10447509 Precompensator-based quantization for clock recovery
US Patent 10665254 Readback waveform oversampling method and apparatus
US Patent 10483910 Multiport inductors for enhanced signal distribution
US Patent 10727786 Multiport inductors for enhanced signal distribution
US Patent 10084623 Multichannel CDR with sharing of adaptation hints and learning
•••
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11038602
Patent Primary Examiner
Emmanuel Bayard
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