US Patent 10915773 Statistics operations on two dimensional image processor

A method is described that includes loading an array of content into a two-dimensional shift register. The two-dimensional shift register is coupled to an execution lane array. The method includes repeatedly performing a first sequence including: shifting with the shift register first content residing along a particular row or column into another parallel row or column where second content resides and performing operations with a particular corresponding row or column of the execution lane array on the first and second content. The method also includes repeatedly performing a second sequence including: shifting with the shift register content from a set of first locations along a resultant row or column that is parallel with the rows or columns of the first sequence into a corresponding set of second locations along the resultant row or column. The resultant row or column has values determined from the operations of the first sequence.