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US Patent 10910364 3D semiconductor device

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
January 8, 2019
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Date of Patent
February 2, 2021
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Patent Application Number
16242300
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Patent Citations
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US Patent 10249596 Fan-out in ball grid array (BGA) package
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US Patent 10199354 Die sidewall interconnects for 3D chip assemblies
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Patent Citations Received
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US Patent 12136576 Microelectronic module
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US Patent 11393807 Densely packed electronic systems
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US Patent 11445640 Water cooled server
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US Patent 11862609 Semiconductor die including fuse structure and methods for forming the same
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US Patent 12107078 Semiconductor die including fuse structure and methods for forming the same
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US Patent 11523543 Water cooled server
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US Patent 11018133 3D integrated circuit
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US Patent 11264455 Backside deep isolation structures for semiconductor device arrays
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US Patent 11270991 Integrated circuits (ICs) employing front side (FS) back end-of-line (BEOL) (FS-BEOL) input/output (I/O) routing and back side (BS) BEOL (BS-BEOL) power routing for current flow organization, and related methods
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US Patent 11750191 Three-dimensional logic circuit
Patent Inventor Names
Zeev Wurman
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Zvi Or-Bach
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
10910364
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Patent Primary Examiner
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Alexander O Williams
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