Patent attributes
Apparatus and associated methods related to a three-dimensional integrated logic circuit that includes a columnar active region. Within the columnar active region resides an interdigitated plurality of semiconductor columns and conductive columns. A plurality of transistors is vertically arranged along each semiconductor column, which extends from a bottom surface of the columnar logic region to a top surface of the columnar logic region. Each of the plurality of transistors of each semiconductor column have source, body, and drain regions horizontally aligned, such that source, drain, and body regions of each of the plurality of transistors are vertically aligned with one another along the semiconductor column. Each of the plurality of conductive columns is adjacent to at least one of the plurality of semiconductor columns and extends along a columnar axis to one or more interconnection layers at the top and/or bottom surfaces of the columnar active layer.
