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US Patent 10417364 Tool to create a reconfigurable interconnect framework
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Is a
Patent
Date Filed
February 2, 2017
Date of Patent
September 17, 2019
Patent Application Number
15423292
Patent Citations Received
US Patent 12118451 Deep convolutional network heterogeneous architecture
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US Patent 11593609 Vector quantization decoding hardware unit for real-time dynamic decompression for parameters of neural networks
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US Patent 11675943 Tool to create a reconfigurable interconnect framework
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US Patent 11836608 Convolution acceleration with embedded vector decompression
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US Patent 11880759 Vector quantization decoding hardware unit for real-time dynamic decompression for parameters of neural networks
0
US Patent 12073308 Hardware accelerator engine
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US Patent 11531873 Convolution acceleration with embedded vector decompression
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US Patent 11562115 Configurable accelerator framework including a stream switch having a plurality of unidirectional stream links
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Patent Inventor Names
Giuseppe Desoli
0
Thomas Boesch
0
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
10417364
Patent Primary Examiner
Paul Dinh
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