Patent attributes
Apparatuses for executing row hammer refresh are described. An example apparatus includes: memory banks, each memory bank of the memory banks includes: a latch that stores a row address; and a time based sampling circuit. The time based sampling circuit includes: a sampling timing generator that provides a timing signal of sampling a row address; and a plurality of bank sampling circuits, wherein each bank sampling circuit of the bank sampling circuits is included in a corresponding memory bank of the memory banks and provides a sampling signal to the latch in the corresponding memory bank responsive to the timing signal of sampling the row address; and an interval measurement circuit that receives an oscillation signal, measures an interval of a row hammer refresh execution based on a cycle of the oscillation signal, and further provides a steal rate timing signal for adjusting a steal rate to the sampling timing generator.
