US Patent 10073733 System and method for in-memory computing

Patent

Purdue Research Foundation

Purdue Research Foundation

US Patent 11687404 Technologies for preserving error correction capability in compute-in-memory operations

US Patent 11393523 Memory unit with asymmetric group-modulated input scheme and current-to-voltage signal stacking scheme for non-volatile computing-in-memory applications and computing method thereof

US Patent 11423983 Memory device and data weight state determining method for in-memory computation

US Patent 11436046 Electronic device with memory processor-based multiprocessing architecture and operation method thereof

US Patent 11894052 Compensated analog computation for an in-memory computation system

US Patent 11934480 NAND block architecture for in-memory multiply-and-accumulate operations

US Patent 11942144 In-memory computation system with drift compensation circuit

US Patent 11513893 Concurrent compute and ECC for in-memory matrix vector operations

US Patent 10481976 Forcing bits as bad to widen the window between the distributions of acceptable high and low resistive bits thereby lowering the margin and increasing the speed of the sense amplifiers

US Patent 10489245 Forcing stuck bits, waterfall bits, shunt bits and low TMR bits to short during testing and using on-the-fly bit failure detection and bit redundancy remapping techniques to correct them

United States Patent and Trademark Office

Son Dinh