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Tuan N. Quach

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Edits on 14 Dec, 2021
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edited on 14 Dec, 2021
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Patent primary examiner of
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US Patent 7375407 Schottky barrier diode and integrated circuit using the same
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US Patent 7378691 Solid-state image sensor
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US Patent 7378734 Stacked contact bump
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US Patent 7391045 Three-dimensional phase-change memory
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US Patent 7391049 Thin-film transistor, thin-film transistor sheet and their manufacturing method
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US Patent 7391079 Metal oxide semiconductor device
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US Patent 7397083 Trench fet with self aligned source and contact
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US Patent 7397121 Semiconductor chip with post-passivation scheme formed over passivation layer
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US Patent 7399701 Semiconductor device manufacturing method including forming a metal silicide layer on an indium-containing layer
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US Patent 7402473 Semiconductor device and process for producing the same
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US Patent 7405101 CMOS imager with selectively silicided gate
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US Patent 7408226 Electronic card with protection against aerial discharge
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US Patent 7411229 Semiconductor device, a manufacturing method thereof, and a camera
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US Patent 7411231 JFET with drain and/or source modification implant
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US Patent 7416955 Method of manufacturing a semiconductor device
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US Patent 7425484 Method of manufacturing semiconductor device
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US Patent 7425720 Semiconductor device
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US Patent 7442970 Active photosensitive structure with buried depletion layer
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US Patent 7442996 Structure and method for enhanced triple well latchup robustness
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US Patent 7449392 Semiconductor device capable of threshold voltage adjustment by applying an external voltage
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US Patent 7459358 Method for fabricating a semiconductor device
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US Patent 7462885 ESD structure for high voltage ESD protection
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US Patent 7462937 Semiconductor device
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US Patent 7470953 Insulated gate type semiconductor device and manufacturing method thereof
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US Patent 7473944 Solid-state imaging device
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US Patent 7476581 Method of manufacturing semiconductor device having dual gate electrode
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US Patent 7476932 U-shape metal-oxide-semiconductor (UMOS) gate structure for high power MOS-based semiconductor devices
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US Patent 7479418 Methods of applying substrate bias to SOI CMOS circuits
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US Patent 7479421 Process for integrating planar and non-planar CMOS transistors on a bulk substrate and article made thereby
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US Patent 7482667 Edge viewing photodetecter
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US Patent 7485508 Two-sided semiconductor-on-insulator structures and methods of manufacturing the same
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US Patent 7485510 Field effect device including inverted V shaped channel region and method for fabrication thereof
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US Patent 7485522 Method of manufacturing semiconductor device having dual gate electrode
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US Patent 7485960 Semiconductor device and manufacturing method thereof
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US Patent 7489008 High Ion/Ioff SOI MOSFET using body voltage control
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US Patent 7489037 Semiconductor device and fabrication method thereof
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US Patent 7495281 Non-volatile memory device and methods of forming and operating the same
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US Patent 7504659 Thin film transistor and flat panel display device including the same
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US Patent 7507995 Semiconductor memory cell and semiconductor memory device
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US Patent 7508083 Electronic component comprising a semiconductor chip and a plastic housing, and method for producing the same
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US Patent 7510956 MOS device with multi-layer gate stack
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US Patent 7511321 Method for forming a dielectric layer and related devices
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US Patent 7511337 Recess gate type transistor
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US Patent 7518178 Semiconductor memory device
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US Patent 7518207 Molecular beam epitaxy growth of ternary and quaternary metal chalcogenide films
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US Patent 7518217 Semiconductor device, semiconductor wafer, chip size package, and methods of manufacturing and inspection therefor
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US Patent 7521750 Semiconductor device having multi-bit nonvolatile memory cell and methods of fabricating the same
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US Patent 7521787 Semiconductor device
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US Patent 7521800 Solder pad and method of making the same
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US Patent 7524731 Process of forming an electronic device including an inductor
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US Patent 7525130 Polarization-doped field effect transistors (POLFETS) and materials and methods for making the same
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US Patent 7531902 Multi-layered metal line of semiconductor device having excellent diffusion barrier and method for forming the same
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US Patent 7535035 Cross-point nonvolatile memory devices using binary metal oxide layer as data storage material layer and methods of fabricating the same
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US Patent 7535046 Dielectric memory and manufacturing method thereof
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US Patent 7544554 Methods of forming gatelines and transistor devices
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US Patent 7544984 Gettering using voids formed by surface transformation
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US Patent 7547935 Semiconductor devices including buried digit lines that are laterally offset from corresponding active-device regions
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US Patent 7547936 Semiconductor memory devices including offset active regions
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US Patent 7550769 Light emitting element, light emitting device and semiconductor device
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US Patent 7550795 SOI devices and methods for fabricating the same
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US Patent 7554139 Semiconductor manufacturing method and semiconductor device
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US Patent 7554151 Low voltage non-volatile memory cell with electrically transparent control gate
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US Patent 7554153 Power semiconductor device
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US Patent 7554154 Bottom source LDMOSFET structure and method
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US Patent 7554205 Flip-chip type semiconductor device
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US Patent 7557404 Nonvolatile memory devices and methods of forming the same
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US Patent 7564082 Gettering using voids formed by surface transformation
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US Patent 7564115 Tapered through-silicon via structure
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US Patent 7566600 SOI device with reduced drain induced barrier lowering
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US Patent 7569426 Apparatus and method integrating an electro-osmotic pump and microchannel assembly into a die package
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US Patent 7569897 Low-capacitance contact for long gate-length devices with small contacted pitch
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US Patent 7572655 Electronic devices having a layer overlying an edge of a different layer and a process for forming the same
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US Patent 7573062 Thin-film transistor, thin-film transistor sheet and their manufacturing method
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US Patent 7582495 Inkjet head, method for producing inkjet head, inkjet recorder and inkjet coater
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US Patent 7582893 Semiconductor memory device comprising one or more injecting bilayer electrodes
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US Patent 7585688 Method for manufacturing semiconductor optical device
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US Patent 7586138 Image sensor and method of forming the same
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US Patent 7588988 Method of forming apparatus having oxide films formed using atomic layer deposition
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US Patent 7592660 Semiconductor device and method for manufacturing the same
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US Patent 7598132 Active photosensitive structure with buried depletion layer
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US Patent 7601549 Method of processing semiconductor wafers
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US Patent 7611978 Method for forming gate electrode of semiconductor device
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US Patent 7611985 Formation of holes in substrates using dewetting coatings
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US Patent 7612393 Active photosensitive structure with buried depletion layer
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US Patent 7612405 Fabrication of FinFETs with multiple fin heights
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US Patent 7615407 Methods and systems for packaging integrated circuits with integrated passive components
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US Patent 7615868 Electrode, method for producing same and semiconductor device using same
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US Patent 7619297 Electronic device including an inductor
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US Patent 7629230 Wafer processing method
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US Patent 7629648 Semiconductor memory device and manufacturing method thereof
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US Patent 7642103 Method of fabricating semiconductor device
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US Patent 7642555 Semiconductor device
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US Patent 7642579 Image sensor comprising pixels with one transistor
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US Patent 7646054 Array of non-volatile memory cells with floating gates formed of spacers in substrate trenches
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US Patent 7659128 Method of processing silicon wafer and method of manufacturing liquid ejecting head
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US Patent 7659621 Solder structures for out of plane connections
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US Patent 7662657 Transparent metal shielded isolation for image sensors
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US Patent 7663177 Non-volatile memory device and fabricating method thereof
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US Patent 7663185 FIN-FET device structure formed employing bulk semiconductor substrate
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US Patent 7670895 Process of forming an electronic device including a semiconductor layer and another layer adjacent to an opening within the semiconductor layer
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US Patent 7675093 Antiblooming imaging apparatus, system, and methods
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US Patent 7679142 Semiconductor wafer, semiconductor device and manufacturing method of semiconductor device
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US Patent 7683422 Non-volatile memory devices with wraparound-shaped floating gate electrodes and methods of forming same
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US Patent 7683443 MOS devices with multi-layer gate stack
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US Patent 7683459 Bonding method for through-silicon-via based 3D wafer stacking
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US Patent 7683484 Bump structure, method of forming bump structure, and semiconductor apparatus using the same
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US Patent 7687852 Recess gate type transistor
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US Patent 7692304 Semiconductor device having a tapered plug
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US Patent 7696004 Wafer level package fabrication method
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US Patent 7700424 Method of forming an embedded silicon carbon epitaxial layer
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US Patent 7700438 MOS device with nano-crystal gate structure
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US Patent 7701009 Source follower circuit or bootstrap circuit, driver circuit comprising such circuit, and display device comprising such driver circuit
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US Patent 7704796 Semiconductor device and method of forming recessed conductive vias in saw streets
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US Patent 7704811 Sub-lithographics opening for back contact or back gate
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US Patent 7705390 Dual bit flash memory devices and methods for fabricating the same
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US Patent 7709312 Methods for inducing strain in non-planar transistor structures
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US Patent 7709374 Fabrication method for memory device
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US Patent 7709887 Semiconductor component and method
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US Patent 7723145 Solid-state imaging device and manufacturing method for the same
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US Patent 7731797 Substrate treating apparatus and semiconductor device manufacturing method
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US Patent 7732273 Semiconductor device manufacturing method and semiconductor device
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US Patent 7732293 Tunable semiconductor diodes
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US Patent 7737495 Semiconductor device having inter-layers with stress levels corresponding to the transistor type
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US Patent 7745248 Fabrication of capacitive micromachined ultrasonic transducers by local oxidation
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US Patent 7745897 Methods for packaging an image sensor and a packaged image sensor
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US Patent 7754501 Method for manufacturing ferroelectric capacitor
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US Patent 7754553 Charge trapping memory device with two separated non-conductive charge trapping inserts and method for making the same
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US Patent 7755085 Semiconductor device and method for fabricating same
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US Patent 7759189 Method of manufacturing a dual contact trench capacitor
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US Patent 7759717 Capacitors comprising dielectric regions having first and second oxide material portions of the same chemical compositon but different densities
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US Patent 7763484 Method to form an optical grating and to form a distributed feedback laser diode with the optical grating
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US Patent 7763507 Stressed interlayer dielectric with reduced probability for void generation in a semiconductor device by using an intermediate etch control layer of increased thickness
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US Patent 7763879 Three-dimensional phase-change memory array
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US Patent 7763985 Flip-chip type semiconductor device
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US Patent 7772061 Method for fabricating semiconductor device using two crystallization methods
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US Patent 7776679 Method for forming silicon wells of different crystallographic orientations
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US Patent 7777275 Silicon-on-insulator structures
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US Patent 7785916 Image sensor and method for manufacturing the same
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US Patent 7786010 Method for forming a thin layer on semiconductor substrates
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US Patent 7799635 Methods of forming nonvolatile memory devices
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US Patent 7803674 Methods for fabricating SOI devices
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US Patent 7808093 Stacked semiconductor device
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US Patent 7811871 Low-capacitance contact for long gate-length devices with small contacted pitch
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US Patent 7812379 SOI devices
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US Patent 7816157 Method of producing semiconductor optical device
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US Patent 7816193 Method for fabricating a pixel structure of a liquid crystal display
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US Patent 7816227 Tapered through-silicon via structure
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US Patent 7824954 Methods of forming phase change memory devices having bottom electrodes
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US Patent 7825508 Multi-die DC-DC buck power converter with efficient packaging
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US Patent 7834449 Highly reliable low cost structure for wafer-level ball grid array packaging
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US Patent 7842600 Methods of forming interlayer dielectrics having air gaps
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US Patent 7846803 Multiple millisecond anneals for semiconductor device fabrication
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US Patent 7851286 Bottom source LDMOSFET method
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US Patent 7858516 Method for forming fine pattern of semiconductor device
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US Patent 7859011 High ion/Ioff SOI MOSFET using body voltage control
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US Patent 7863159 Semiconductor die separation method
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US Patent 7863669 Nonvolatile semiconductor memory device
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US Patent 7871837 Display panel manufacturing method
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US Patent 7871879 Method of manufacturing semiconductor memory device
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US Patent 7884413 Semiconductor device
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US Patent 7884424 Structure of MTCMOS cell
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US Patent 7892869 Method for manufacturing light emitting diode assembly
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US Patent 7897523 Substrate heating apparatus, heating method, and semiconductor device manufacturing method
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US Patent 7901954 Method for detecting a void
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US Patent 7901971 Method for manufacturing a sensor device with a stress relief layer
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US Patent 7906351 Method for metal gate quality characterization
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US Patent 7906434 Manufacturing method of semiconductor devices
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US Patent 7915077 Methods of making metal core foldover package structures
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US Patent 7915120 Method of fabricating non-volatile memory device
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US Patent 7923268 Method of measuring resistivity of sidewall of contact hole
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US Patent 7923356 Semiconductor film, semiconductor device and method for manufacturing same
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US Patent 7928502 Transistor devices with nano-crystal gate structures
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US Patent 7932120 Methods of manufacturing CMOS image sensors
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US Patent 7932123 Release strategies for making transferable semiconductor structures, devices and device components
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US Patent 7939885 Semiconductor device and method of manufacturing a semiconductor device
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US Patent 7948072 Wafer-to-wafer stacking
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US Patent 7951726 Organic/inorganic hybrid thin film passivation layer for blocking moisture/oxygen transmission and improving gas barrier property
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US Patent 7955948 Manufacturing method of semiconductor device
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US Patent 7956459 Semiconductor device and method of assembly
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US Patent 7956460 Semiconductor chip and method for manufacturing same, electrode structure of semiconductor chip and method for forming same, and semiconductor device
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US Patent 7968959 Methods and systems of thick semiconductor drift detector fabrication
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US Patent 7977235 Method for manufacturing a semiconductor device with metal-containing cap layers
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US Patent 7985996 Semiconductor device comprising capacitive elements
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US Patent 7989365 Remote plasma source seasoning
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US Patent 7993974 Method for manufacturing a semiconductor device
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US Patent 7994582 Stacked load-less static random access memory device
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US Patent 8003517 Method for forming interconnects for 3-D applications
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US Patent 8004032 System and method for providing low voltage high density multi-bit storage flash memory
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US Patent 8012795 Method and device for fabricating an assembly of at least two microelectronic chips
Edits on 13 Dec, 2021
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Golden AI
edited on 13 Dec, 2021
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US Patent 8012795 Method and device for fabricating an assembly of at least two microelectronic chips
Edits on 8 Dec, 2021
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Golden AI
edited on 8 Dec, 2021
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Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 8004032 System and method for providing low voltage high density multi-bit storage flash memory
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Golden AI
edited on 8 Dec, 2021
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Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 8003517 Method for forming interconnects for 3-D applications
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Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 7994582 Stacked load-less static random access memory device
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Golden AI
edited on 8 Dec, 2021
Edits made to:
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Infobox
Patent primary examiner of
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US Patent 7993974 Method for manufacturing a semiconductor device
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Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 7989365 Remote plasma source seasoning
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Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 7985996 Semiconductor device comprising capacitive elements
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Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 7977235 Method for manufacturing a semiconductor device with metal-containing cap layers
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Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 7968959 Methods and systems of thick semiconductor drift detector fabrication
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Golden AI
edited on 7 Dec, 2021
Edits made to:
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Infobox
Patent primary examiner of
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US Patent 7956459 Semiconductor device and method of assembly
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Golden AI
edited on 7 Dec, 2021
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Golden AI
edited on 7 Dec, 2021
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Infobox
Patent primary examiner of
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US Patent 7955948 Manufacturing method of semiconductor device
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Golden AI
edited on 7 Dec, 2021
Golden AI profile picture
Golden AI
edited on 7 Dec, 2021
Edits made to:
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Infobox
Patent primary examiner of
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US Patent 7948072 Wafer-to-wafer stacking
Edits on 7 Dec, 2021
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Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 7939885 Semiconductor device and method of manufacturing a semiconductor device
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Golden AI
edited on 7 Dec, 2021
Golden AI profile picture
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 7932120 Methods of manufacturing CMOS image sensors
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Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 7928502 Transistor devices with nano-crystal gate structures
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Golden AI
edited on 7 Dec, 2021
Edits made to:
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Infobox
Patent primary examiner of
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US Patent 7923356 Semiconductor film, semiconductor device and method for manufacturing same

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