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Robert Fennema
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Edits on 14 Dec, 2021
"Remove inverse infobox"
Golden AI
edited on 14 Dec, 2021
Edits made to:
Infobox
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-22
properties)
Infobox
Patent primary examiner of
US Patent RE42170 Control of information processing using one or more peripheral apparatus
US Patent 7895412 Programmable arrayed processing engine architecture for a network switch
US Patent 7925860 Maximized memory throughput using cooperative thread arrays
US Patent 7937561 Merge microinstruction for minimizing source dependencies in out-of-order execution microprocessor with variable data size macroarchitecture
US Patent 7937569 System and method for scheduling operations using speculative data operands
US Patent 7937574 Precise counter hardware for microcode loops
US Patent 7941638 Facilitating fast scanning for control transfer instructions in an instruction fetch unit
US Patent 7941639 Protection of the execution of a program
US Patent 7941641 Retargetable instruction decoder for a computer processor
US Patent 7941642 Method for selecting between divide instructions associated with respective threads in a multi-threaded processor
US Patent 7941643 Multi-thread processor with multiple program counters
US Patent 7941645 Isochronous pipelined processor with deterministic control
US Patent 7941651 Method and apparatus for combining micro-operations to process immediate data
US Patent 7941652 Apparatus and computer program product for implementing atomic data tracing
US Patent 7945763 Single shared instruction predecoder for supporting multiple processors
US Patent 7945764 Processing unit incorporating multirate execution unit
US Patent 7949857 Method and system for determining multiple unused registers in a processor
US Patent 7962724 Branch loop performance enhancement
US Patent 7966477 Power optimized replay of blocked operations in a pipilined architecture
US Patent 7984276 Method and system for altering processor execution of a group of instructions
US Patent 8001361 Structure for a single shared instruction predecoder for supporting multiple processors
US Patent 8006077 Thread migration control based on prediction of migration overhead
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
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+1
properties)
Infobox
Patent primary examiner of
US Patent 8006077 Thread migration control based on prediction of migration overhead
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8001361 Structure for a single shared instruction predecoder for supporting multiple processors
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7984276 Method and system for altering processor execution of a group of instructions
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7966477 Power optimized replay of blocked operations in a pipilined architecture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7962724 Branch loop performance enhancement
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7949857 Method and system for determining multiple unused registers in a processor
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7945764 Processing unit incorporating multirate execution unit
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7945763 Single shared instruction predecoder for supporting multiple processors
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7941651 Method and apparatus for combining micro-operations to process immediate data
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7941638 Facilitating fast scanning for control transfer instructions in an instruction fetch unit
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7941652 Apparatus and computer program product for implementing atomic data tracing
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7941642 Method for selecting between divide instructions associated with respective threads in a multi-threaded processor
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7941645 Isochronous pipelined processor with deterministic control
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7941643 Multi-thread processor with multiple program counters
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7941641 Retargetable instruction decoder for a computer processor
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7941639 Protection of the execution of a program
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7937574 Precise counter hardware for microcode loops
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7937569 System and method for scheduling operations using speculative data operands
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7937561 Merge microinstruction for minimizing source dependencies in out-of-order execution microprocessor with variable data size macroarchitecture
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