SBIR/STTR Award attributes
Field programmable gate arrays (FPGAs) are becoming increasingly critical components in advanced electronic systems. However, limited research has been applied to identifying critical vulnerabilities that could be present in the designs deployed on these FPGAs. The risk is further increased by the use of 3rd party intellectual property in many designs.GrammaTech is proposing to develop a Trust verification framework to verify the trustworthiness of FPGA designs. Our solution will operate on the actual configuration bits of the FPGA to verify the design as deployed. Our approach will operate with limited prior design knowledge to physically locate and report on potential vulnerabilities and/or hardware Trojans in the FPGA design. It will also be flexible enough to support a top-down design verification methodology and expansion through additional analyses including formal verification methods. Our detection algorithms will be equally applicable for Trust verification of digital ASIC designs. GrammaTech is actively working to complement its leadership software vulnerability analysis tools with an equally robust tool-suite for hardware vulnerability analysis and enable unified reporting of system vulnerability analyses.
