SBIR/STTR Award attributes
In this effort, Voxtel will design and fabricate multiple, highly efficient, digital-to-analog and analog-to-digital data converters integrated into a monolithic integrated circuit (IC) chip. In Phase I, after refining the requirements with U.S. government and other stakeholders, we will conduct a design trade study that includes optimized configurations of the required data-converter blocks. We will use these to develop the preliminary design architectures necessary to incorporate a single analog-to-digital converter (ADC) block, with a dual digital-to-analog (DAC) configuration that is capable of supporting a serial interface to manipulate certain parameters to meet performance specs. After a preliminary design review (PDR), we will design, simulate, validate, and lay out the data-converter IC for fabrication using a domestic 130-nm CMOS IC process. In Phase II, we will test the prototype Integrated Multi-Data-Conversion IC, then design and fabricate a fully functional data-converter IC that: meets operational requirements; interfaces with proximity-fuze sensors and FPGA; can be packaged in a small-package footprint; provides simple interface and communication; and is capable of withstanding harsh environments including but not limited to shock, vibration, and extreme operating and storage temperatures.
