SBIR/STTR Award attributes
A scalable multi-mode digital readout integrated circuit (DROIC) will be developed that is capable of time-of-flight laser ranging (ladar), asynchronous laser pulse detection (ALPD), multi-pulse detection, and range-gated imaging. The low-power DROIC will be optimized for polarity-independent operation when coupled to the variety of detector arrays sensitive over the reflected infrared (i.e., SWIR) or thermal infrared (i.e., MWIR or LWIR) spectral regions. In Phase I, after working with the government stakeholders to refine the DROIC operational requirements, the readout circuit architecture will be defined and transistor-level design, modeling, and simulation of the critical pixel and readout circuits will be performed. In the Phase I option, the pixel circuits and layout will be completed, and their performance will be simulated against the process corners. The Phase I and Phase I option will sufficiently demonstrate feasibility and reduce program risk for a Phase II program award that will allow the DROIC to be completed through tape-out.
