US Patent 9869719 High speed controllable load

A high speed controllable load uses a voltage waveform synthesizer and a driver circuit to dynamically control an electronically variable load to generate a current though an arc fault circuit interrupter (AFCI) device under test. Sensors may be used to monitor a source voltage and the output current to generate an arbitrary waveform have a range of voltage and current phase shifts. An optical isolation circuit allows separation of grounds between a control stage and the AFCI device under test.