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US Patent 9761604 3D vertical NAND with III-V channel

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Patent
Patent
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Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
0
Patent Number
97616040
Patent Inventor Names
Johann Alsmeier0
Peter Rabkin0
Jayavel Pachamuthu0
Masaaki Higashitani0
Date of Patent
September 12, 2017
0
Patent Application Number
146666780
Date Filed
March 24, 2015
0
Patent Citations Received
‌
US Patent 11963360 Semiconductor device
0
Patent Primary Examiner
‌
Ali Naraghi
0
Patent abstract

Disclosed herein is 3D memory with vertical NAND strings having a III-V compound channel, as well as methods of fabrication. The III-V compound has at least one group III element and at least one group V element. The III-V compound provides for high electron mobility transistor cells. Note that III-V materials may have a much higher electron mobility compared to silicon. Thus, much higher cell current and overall cell performance can be achieved. Also, the memory device may have better read-write efficiency due to much higher carrier mobility and velocity. The tunnel dielectric of the memory cells may have an Al2O3 film in direct contact with the III-V NAND channel. The drain end of the NAND channel may be a metal-III-V alloy in direct contact with a metal region. The body of the source side select transistor could be formed from the III-V compound or from crystalline silicon.

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