US Patent 9703313 Peripheral clock management

A clock generator for use in an electronic system comprising an integrated circuit such as a microcontroller. A plurality of oscillators are selectively enabled to produce a respective plurality of oscillator signals. For each of a plurality of clock outputs, a mux selects a respective one of the oscillator signals in response to a respective select signal provided by a clocked facility. The selected oscillator signal is gated out as the respective clock signal in response to a respective gate signal also provided by the clocked facility.