US Patent 9691782 Non-volatile memory device

A non-volatile memory device includes a substrate, a memory cell array on the substrate, a plurality of bonding pads, and a pad circuit. The memory cell array includes a plurality of gate conductive layers stacked on the substrate in a vertical direction and a plurality of channels penetrating into the plurality of gate conductive layers on an upper portion of the substrate. The plurality of bonding pads are on at least part of an upper portion of the memory cell array. The plurality of bonding pads are configured to electrically connect the non-volatile memory device to an external device. The pad circuit is between the substrate and the memory cell array. The pad circuit is electrically connected to at least one of the plurality of bonding pads.