Patent attributes
A semiconductor device package includes an isolation wall located between a first circuit and a second circuit on a substrate. The isolation wall is configured to reduce inductive coupling between the first and second circuits during operation of the semiconductor device. Encapsulation material covers the substrate, first and second circuits, and the isolation wall. The isolation wall has features, such as indentation, along its upper edge that facilitate a flow of the encapsulation material across the isolation wall during fabrication to largely eliminate interior defects and/or visual defects on the surface of the completed semiconductor device package. For a dual-path amplifier, such as a Doherty power amplifier, the isolation wall separates the carrier amplifier elements from the peaking amplifier elements included within the semiconductor device package.
