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US Patent 9594859 Apparatus and associated methods for parallelizing clustering and placement

Patent 9594859 was granted and assigned to Altera on March, 2017 by the United States Patent and Trademark Office.

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Patent abstractTimelineTable: Further ResourcesReferences
Is a
Patent
Patent
1

Patent attributes

Current Assignee
Altera
Altera
1
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
1
Patent Number
95948591
Patent Inventor Names
Ketan Padalia1
Vaughn Betz1
Adrian Ludwin1
Ryan Fung1
Date of Patent
March 14, 2017
1
Patent Application Number
120407301
Date Filed
February 29, 2008
1
Patent Citations Received
‌
US Patent 11755676 Systems and methods for generating real-time recommendations
‌
US Patent 12019964 Optimizing use of computer resources in implementing circuit designs through machine learning
2
Patent Primary Examiner
‌
Binh Tat
1
Patent abstract

A system for parallelizing software in computer-aided design (CAD) software for circuit design includes a computer. The computer is configured to form or optimize a plurality of clusters in parallel. Each cluster in the plurality of clusters includes a set of nodes in a netlist in a design. The computer is configured to determine placements for blocks in a netlist in parallel, based on iterative improvement, partitioning, or analytic techniques.

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