US Patent 9508446 Temperature compensated reverse current for memory

One aspect of the technology is a memory device comprising a memory array, a sense circuit, and temperature compensated bias circuitry. The memory array is electrically coupled between a bit line bias circuit and a common source line. The bit line bias circuit generates a temperature compensated sense current through the memory array. The temperature compensated bias circuitry controls the bit line bias circuit to generate the temperature compensated sense current through the memory array.