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US Patent 9355034 Removal and optimization of coherence acknowledgement responses in an interconnect

Patent 9355034 was granted and assigned to SAMSUNG ELECTRONICS CO., LTD. on May, 2016 by the United States Patent and Trademark Office.

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Is a
Patent
Patent
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Patent attributes

Current Assignee
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
93550340
Patent Inventor Names
Kevin M. Lepak0
William A. Hughes0
Date of Patent
May 31, 2016
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Patent Application Number
142746030
Date Filed
May 9, 2014
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Patent Citations Received
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US Patent 12007895 Scalable system on a chip
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US Patent 11803471 Scalable system on a chip
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US Patent 11868258 Scalable cache coherency protocol
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US Patent 11934313 Scalable system on a chip
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US Patent 11947457 Scalable cache coherency protocol
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Patent Primary Examiner
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Than Nguyen
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Patent abstract

According to one general aspect, a method of performing a cache transaction may include transmitting a cache request to a target device. The method may include receiving a cache response that is associated with the cache request. The method may further include completing the cache transaction without transmitting an exclusive cache response acknowledgement message to the target device.

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