US Patent 9208836 Chip-to-chip signaling with improved bandwidth utilization

Integrated circuit devices transmit data via a shared signaling link in back to back burst intervals without contention and without insertion of performance-degrading bubbles by disabling output drivers during an interval that occurs at an edge or “margin” of a given burst interval and thus at a timing boundary between the back to back burst intervals. In “bit-level margining” embodiments, the driver-disabling operation or “margining” is performed during a portion of each bit interval (i.e., a unit of time allocated to transmission of a bit or other symbol. In “burst-level margining” embodiments, output drivers are disabled over an entire bit interval that occurs at the margin of a given burst interval.