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US Patent 9153552 Bumpless build-up layer package including an integrated heat spreader

Patent 9153552 was granted and assigned to Intel on October, 2015 by the United States Patent and Trademark Office.

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Is a
Patent
Patent
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Patent attributes

Patent Applicant
Intel
Intel
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Current Assignee
Intel
Intel
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
91535520
Date of Patent
October 6, 2015
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Patent Application Number
145707850
Date Filed
December 15, 2014
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Patent Citations Received
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US Patent 12113056 Stacked dies and methods for forming bonded structures
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US Patent 12107042 Localized high density substrate routing
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US Patent 11764177 Bonded structure with interconnect structure
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US Patent 11935907 Image sensor device
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US Patent 11955463 Direct bonded stack structures for increased reliability and improved yield in microelectronics
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US Patent 11984396 Localized high density substrate routing
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Patent Primary Examiner
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Nitin Parekh
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Patent abstract

An example includes a die package including a microelectronic die having a lower die surface, an upper die surface parallel to the lower die surface, and a die side, the microelectronic die including an active region and an inactive region. The example optionally includes a heat spreader having a lower heat spreader surface, an upper heat spreader surface parallel to the lower heat spreader surface, and at least one heat spreader side, the heat spreader disposed on the upper surface of the microelectronic die in thermal communication with the inactive region of the die and electrically insulated from the active region. The example optionally includes an encapsulation material encapsulating the die side and the heat spreader side and lower heat spreader surface, the encapsulation material including a lower surface substantially parallel to the die lower surface and an upper surface substantially parallel to the die upper surface.

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