US Patent 9086872 Unpacking packed data in multiple lanes
Patent 9086872 was granted and assigned to Intel on July, 2015 by the United States Patent and Trademark Office.
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Receiving an instruction indicating first and second operands. Each of the operands having packed data elements that correspond in respective positions. A first subset of the data elements of the first operand and a first subset of the data elements of the second operand each corresponding to a first lane. A second subset of the data elements of the first operand and a second subset of the data elements of the second operand each corresponding to a second lane. Storing result, in response to instruction, including: (1) in first lane, only lowest order data elements from first subset of first operand interleaved with corresponding lowest order data elements from first subset of second operand; and (2) in second lane, only highest order data elements from second subset of first operand interleaved with corresponding highest order data elements from second subset of second operand.
US Patent 09086872 Unpacking packed data in multiple lanes US Patent 9086872 Unpacking packed data in multiple lanes
US Patent 09086872 Unpacking packed data in multiple lanes
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