US Patent 9053807 Non-volatile semiconductor memory device

A non-volatile semiconductor device includes a memory array including a plurality of memory cell transistors electrically connected between bit lines and source lines, wherein the memory array is partitioned into a plurality of memory blocks, and a source line driver configured to set a voltage level of the source lines to a reference voltage level. First and second wirings are respectively connected to a first monitoring position of the source lines and a second monitoring position of the source lines different from the first monitoring position. A selection circuit selects between the first and second monitoring positions. A source line voltage control circuit compares a source line voltage at a selected monitoring position, and outputs a result to the source line driver.