Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Hyun Jung Lee0
Robert W. Warren0
Nic Rossi0
Date of Patent
May 12, 2015
Patent Application Number
12927549
Date Filed
November 16, 2010
Patent Citations Received
0
Patent Primary Examiner
Patent abstract
An example semiconductor package with reduced solder voiding is described, which has a leadframe having an I/O pad and a thermal pad, a fabricated semiconductor die having a bond pad, where the fabricated semiconductor die is attached to a top surface of the thermal pad, and a wire bond connecting the bond pad to the I/O pad, where a bottom surface of the thermal pad has channels.
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