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US Patent 8993380 Structure and method for 3D IC package
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Patent
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Date Filed
March 8, 2013
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Date of Patent
March 31, 2015
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Patent Application Number
13791305
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Patent Citations Received
US Patent 12136619 Methods of manufacturing three-dimensional integrated circuit structures
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US Patent 12125782 Semiconductor structure and method of forming the same
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US Patent 12125798 Semiconductor package and method
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US Patent 12125812 Integrated circuit packages and methods of forming the same
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US Patent 12125819 Die on die bonding structure
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US Patent 12131974 Semiconductor package and method of manufacturing semiconductor package
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US Patent 12132024 Semiconductor package and method of manufacturing the same
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US Patent 12137566 Peripheral circuitry under array memory device and method of fabricating thereof
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US Patent 11658119 Backside signal interconnection
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US Patent 11658172 Hybrid bonding with through substrate via (TSV)
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•••
Patent Inventor Names
Der-Chyang Yeh
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Chen-Hua Yu
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Shang-Yun Hou
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Shin-Puu Jeng
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
8993380
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Patent Primary Examiner
Yasser A Abdelaziez
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