US Patent 8704544 Method and apparatus for multi-planar edge-extended wafer translator

An apparatus, suitable for coupling a pads of integrated circuits on wafer to the pogo pins of a pogo tower in a test system without the need of a probe card, includes a body having a first surface and a second surface, the body having a substantially circular central portion, and a plurality of bendable arms extending outwardly from the central portion, each bendable arm having a connector tab disposed at the distal end thereof; a first plurality of contact terminals disposed on the second surface of the central portion of the body, the first plurality of contact terminals arranged in pattern to match the layout of pads on a wafer to be contacted; at least one contact terminal disposed on the first surface of the plurality of connector tabs; and a plurality of electrically conductive pathways disposed in the body such that each of the first plurality of contact terminals is electrically connected to a corresponding one of the contact terminals on the first surface of the connector tabs.