US Patent 8004907 SRAM with read and write assist
Patent 8004907 was granted and assigned to Freescale Semiconductor on August, 2011 by the United States Patent and Trademark Office.
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A memory includes an SRAM bitcell including a pair of cross-coupled inverters, wherein a first inverter of the pair includes a first device having a body and a second inverter of the pair includes a second device having a body. A first selection circuit has a first input coupled to a first supply voltage terminal, a second input coupled to a second supply voltage terminal, and an output coupled to a first current electrode of the first device and to a first current electrode of the second device. A second selection circuit has a first input coupled to the first supply voltage terminal, a second input coupled to the second supply voltage terminal, and an output coupled to the body of each of the first and second devices. A word line coupled to the SRAM bitcell is driven by a word line driver coupled to the first supply voltage terminal.
US Patent 08004907 SRAM with read and write assist US Patent 8004907 SRAM with read and write assist
US Patent 08004907 SRAM with read and write assist
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