Patent attributes
A package on package substrate is disclosed. The package on package substrate in accordance with an embodiment of the present invention can include a bottom package substrate, on which and an electronic element is mounted and of which an upper surface is formed with a bottom pad part and a solder resist part corresponding to the bottom pad part, and a top package substrate, which is stacked on an upper side of the bottom package substrate by interposing a solder between the top package substrate and the bottom package substrate and of which a lower surface is formed with a top pad part corresponding to the bottom pad part. The solder resist part can include a first solder resist layer, which is formed on the upper surface of the bottom package substrate, corresponding to the bottom pad part, and a second solder resist layer, which is formed on the first solder resist layer such that the bottom pad part is exposed.
